patch-2.3.99-pre6 linux/arch/ia64/kernel/gate.S

• Lines: 100
• Date: Fri Apr 21 15:21:24 2000
• Orig file: v2.3.99-pre5/linux/arch/ia64/kernel/gate.S
• Orig date: Fri Mar 10 16:40:39 2000

diff -u --recursive --new-file v2.3.99-pre5/linux/arch/ia64/kernel/gate.S linux/arch/ia64/kernel/gate.S
@@ -80,8 +80,6 @@
 ia64_sigtramp:
 	ld8 r10=[r3],8				// get signal handler entry point
 	br.call.sptk.many rp=invoke_sighandler
-.ret0:	mov r15=__NR_rt_sigreturn
-	break __BREAK_SYSCALL
 	.endp ia64_sigtramp
 
 	.proc invoke_sighandler
@@ -90,10 +88,9 @@
 	mov b6=r10
 	cover				// push args in interrupted frame onto backing store
 	;;
-	alloc r8=ar.pfs,0,1,3,0		// get CFM0, EC0, and CPL0 into r8
-	mov r17=ar.bsp			// fetch ar.bsp
-	mov loc0=rp			// save return pointer
+	alloc r8=ar.pfs,0,0,3,0		// get CFM0, EC0, and CPL0 into r8
 	;;
+	mov r17=ar.bsp			// fetch ar.bsp
 	cmp.ne p8,p0=r15,r0		// do we need to switch the rbs?
 	mov out0=r2			// signal number
 (p8)	br.cond.spnt.few setup_rbs	// yup -> (clobbers r14 and r16)
@@ -101,10 +98,11 @@
 	adds base0=(BSP_OFF+SIGCONTEXT_OFF),sp
 	;;
 	st8 [base0]=r17,(CFM_OFF-BSP_OFF)	// save sc_ar_bsp
+	dep r8=0,r8,38,26		// clear EC0, CPL0 and reserved bits
 	adds base1=(FR6_OFF+16+SIGCONTEXT_OFF),sp
 	;;
 
-	st8 [base0]=r8				// save CFM0, EC0, and CPL0
+	st8 [base0]=r8				// save CFM0
 	adds base0=(FR6_OFF+SIGCONTEXT_OFF),sp
 	;;
 	stf.spill [base0]=f6,32
@@ -124,7 +122,8 @@
 	stf.spill [base0]=f14,32
 	stf.spill [base1]=f15,32
 	br.call.sptk.few rp=b6			// call the signal handler
-.ret2:	adds base0=(BSP_OFF+SIGCONTEXT_OFF),sp
+.ret2:
+	adds base0=(BSP_OFF+SIGCONTEXT_OFF),sp
 	;;
 	ld8 r15=[base0],(CFM_OFF-BSP_OFF)	// fetch sc_ar_bsp and advance to CFM_OFF
 	mov r14=ar.bsp
@@ -134,23 +133,11 @@
 (p8)	br.cond.spnt.few restore_rbs		// yup -> (clobbers r14 and r16)
 	;;
 back_from_restore_rbs:
-	{
-	  and r9=0x7f,r8			// r9  <- CFM0.sof
-	  extr.u r10=r8,7,7			// r10 <- CFM0.sol
-	  mov r11=ip
-	}
-	;;
 	adds base0=(FR6_OFF+SIGCONTEXT_OFF),sp
-	adds r11=(cont-back_from_restore_rbs),r11
-	sub r9=r9,r10				// r9 <- CFM0.sof - CFM0.sol == CFM0.nout
-	;;
 	adds base1=(FR6_OFF+16+SIGCONTEXT_OFF),sp
-	dep r9=r9,r9,7,7			// r9.sol = r9.sof
-	mov b6=r11
 	;;
 	ldf.fill f6=[base0],32
 	ldf.fill f7=[base1],32
-	mov rp=loc0			// copy return pointer out of stacked register
 	;;
 	ldf.fill f8=[base0],32
 	ldf.fill f9=[base1],32
@@ -160,26 +147,23 @@
 	;;
 	ldf.fill f12=[base0],32
 	ldf.fill f13=[base1],32
-	mov ar.pfs=r9
 	;;
 	ldf.fill f14=[base0],32
 	ldf.fill f15=[base1],32
-	br.ret.sptk.few b6
-cont:	mov ar.pfs=r8				// ar.pfs = CFM0
-	br.ret.sptk.few rp			// re-establish CFM0
+	mov r15=__NR_rt_sigreturn
+	break __BREAK_SYSCALL
 	.endp invoke_sighandler
 
 	.proc setup_rbs
 setup_rbs:
 	flushrs					// must be first in insn
-	;;
 	mov ar.rsc=r0				// put RSE into enforced lazy mode
 	adds r16=(RNAT_OFF+SIGCONTEXT_OFF),sp
-	mov r14=ar.rnat				// get rnat as updated by flushrs
 	;;
+	mov r14=ar.rnat				// get rnat as updated by flushrs
 	mov ar.bspstore=r15			// set new register backing store area
-	st8 [r16]=r14				// save sc_ar_rnat
 	;;
+	st8 [r16]=r14				// save sc_ar_rnat
 	mov ar.rsc=0xf				// set RSE into eager mode, pl 3
 	invala					// invalidate ALAT
 	br.cond.sptk.many back_from_setup_rbs