patch-2.3.17 linux/arch/i386/kernel/traps.c
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- Lines: 36
- Date:
Sat Sep 4 13:06:08 1999
- Orig file:
v2.3.16/linux/arch/i386/kernel/traps.c
- Orig date:
Wed Aug 18 11:27:34 1999
diff -u --recursive --new-file v2.3.16/linux/arch/i386/kernel/traps.c linux/arch/i386/kernel/traps.c
@@ -46,8 +46,10 @@
asmlinkage int system_call(void);
asmlinkage void lcall7(void);
+asmlinkage void lcall27(void);
-struct desc_struct default_ldt = { 0, 0 };
+struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
+ { 0, 0 }, { 0, 0 } };
/*
* The IDT has to be page-aligned to simplify the Pentium
@@ -67,8 +69,8 @@
{ \
tsk->thread.error_code = error_code; \
tsk->thread.trap_no = trapnr; \
- force_sig(signr, tsk); \
die_if_no_fixup(str,regs,error_code); \
+ force_sig(signr, tsk); \
}
#define DO_VM86_ERROR(trapnr, signr, str, name, tsk) \
@@ -696,9 +698,11 @@
set_system_gate(SYSCALL_VECTOR,&system_call);
/*
- * default LDT is a single-entry callgate to lcall7
+ * default LDT is a single-entry callgate to lcall7 for iBCS
+ * and a callgate to lcall27 for Solaris/x86 binaries
*/
- set_call_gate(&default_ldt,lcall7);
+ set_call_gate(&default_ldt[0],lcall7);
+ set_call_gate(&default_ldt[4],lcall27);
/*
* on SMP we do not yet know which CPU is on which TSS,
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