patch-2.1.112 linux/drivers/net/wavelan.h

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diff -u --recursive --new-file v2.1.111/linux/drivers/net/wavelan.h linux/drivers/net/wavelan.h
@@ -1,34 +1,34 @@
 /*
- *	Wavelan ISA driver
+ *	WaveLAN ISA driver
  *
  *		Jean II - HPLB '96
  *
  * Reorganisation and extension of the driver.
- * Original copyrigth follow. See wavelan.p.h for details.
+ * Original copyright follows. See wavelan.p.h for details.
  *
- * This file contain the declarations of the Wavelan hardware. Note that
- * the Wavelan ISA include a i82586 controler (see definitions in
+ * This file contains the declarations for the WaveLAN hardware. Note that
+ * the WaveLAN ISA includes a i82586 controller (see definitions in
  * file i82586.h).
  *
- * The main difference between the ISA hardware and the pcmcia one is
- * the Ethernet Controler (i82586 instead of i82593).
- * The i82586 allow multiple transmit buffers. The PSA need to be accessed
+ * The main difference between the ISA hardware and the PCMCIA one is
+ * the Ethernet controller (i82586 instead of i82593).
+ * The i82586 allows multiple transmit buffers.  The PSA needs to be accessed
  * through the host interface.
  */
 
 #ifndef _WAVELAN_H
 #define	_WAVELAN_H
 
-/* The detection of the wavelan card is made by reading the MAC
- * address from the card and checking it. If you have a non AT&T
- * product (OEM, like DEC RoamAbout, or Digital Ocean, Epson, ...),
- * you might need to modify this part to accomodate your hardware...
+/* Detection of the WaveLAN card is done by reading the MAC
+ * address from the card and checking it.  If you have a non-AT&T
+ * product (OEM, like DEC RoamAbout, Digital Ocean, or Epson),
+ * you might need to modify this part to accommodate your hardware.
  */
 const char	MAC_ADDRESSES[][3] =
 {
-  { 0x08, 0x00, 0x0E },		/* AT&T Wavelan (standard) & DEC RoamAbout */
-  { 0x08, 0x00, 0x6A },		/* AT&T Wavelan (alternate) */
-  /* Add your card here and send me the patch ! */
+  { 0x08, 0x00, 0x0E },		/* AT&T WaveLAN (standard) & DEC RoamAbout */
+  { 0x08, 0x00, 0x6A },		/* AT&T WaveLAN (alternate) */
+  /* Add your card here and send me the patch! */
 };
 
 #define WAVELAN_ADDR_SIZE	6	/* Size of a MAC address */
@@ -49,7 +49,7 @@
 	unsigned short	hu_command;		/* Command register */
 #define		HACR_RESET		0x0001	/* Reset board */
 #define		HACR_CA			0x0002	/* Set Channel Attention for 82586 */
-#define		HACR_16BITS		0x0004	/* 16 bits operation (0 => 8bits) */
+#define		HACR_16BITS		0x0004	/* 16-bit operation (0 => 8bits) */
 #define		HACR_OUT0		0x0008	/* General purpose output pin 0 */
 						/* not used - must be 1 */
 #define		HACR_OUT1		0x0010	/* General purpose output pin 1 */
@@ -112,11 +112,11 @@
 /************************** MEMORY LAYOUT **************************/
 
 /*
- * Onboard 64k RAM layout.
+ * Onboard 64 k RAM layout.
  * (Offsets from 0x0000.)
  */
-#define OFFSET_RU		0x0000		/* 75 % memory */
-#define OFFSET_CU		0xC000		/* 25 % memory */
+#define OFFSET_RU		0x0000		/* 75% memory */
+#define OFFSET_CU		0xC000		/* 25% memory */
 #define OFFSET_SCB		(OFFSET_ISCP - sizeof(scb_t))
 #define OFFSET_ISCP		(OFFSET_SCP - sizeof(iscp_t))
 #define OFFSET_SCP		I82586_SCP_ADDR
@@ -151,26 +151,26 @@
   unsigned char	psa_univ_local_sel;	/* [0x1C] Universal Local Selection */
 #define		PSA_UNIVERSAL	0		/* Universal (factory) */
 #define		PSA_LOCAL	1		/* Local */
-  unsigned char	psa_comp_number;	/* [0x1D] Compatability Number: */
-#define		PSA_COMP_PC_AT_915	0 	/* PC-AT 915 MHz	*/
-#define		PSA_COMP_PC_MC_915	1 	/* PC-MC 915 MHz	*/
-#define		PSA_COMP_PC_AT_2400	2 	/* PC-AT 2.4 GHz	*/
-#define		PSA_COMP_PC_MC_2400	3 	/* PC-MC 2.4 GHz	*/
+  unsigned char	psa_comp_number;	/* [0x1D] Compatibility Number:	 */
+#define		PSA_COMP_PC_AT_915	0 	/* PC-AT 915 MHz 	 */
+#define		PSA_COMP_PC_MC_915	1 	/* PC-MC 915 MHz	 */
+#define		PSA_COMP_PC_AT_2400	2 	/* PC-AT 2.4 GHz	 */
+#define		PSA_COMP_PC_MC_2400	3 	/* PC-MC 2.4 GHz 	 */
 #define		PSA_COMP_PCMCIA_915	4 	/* PCMCIA 915 MHz or 2.0 */
   unsigned char	psa_thr_pre_set;	/* [0x1E] Modem Threshold Preset */
   unsigned char	psa_feature_select;	/* [0x1F] Call code required (1=on) */
 #define		PSA_FEATURE_CALL_CODE	0x01 	/* Call code required (Japan) */
-  unsigned char	psa_subband;		/* [0x20] Subband	*/
+  unsigned char	psa_subband;		/* [0x20] Subband	  */
 #define		PSA_SUBBAND_915		0	/* 915 MHz or 2.0 */
-#define		PSA_SUBBAND_2425	1	/* 2425 MHz	*/
-#define		PSA_SUBBAND_2460	2	/* 2460 MHz	*/
-#define		PSA_SUBBAND_2484	3	/* 2484 MHz	*/
-#define		PSA_SUBBAND_2430_5	4	/* 2430.5 MHz	*/
+#define		PSA_SUBBAND_2425	1	/* 2425 MHz	  */
+#define		PSA_SUBBAND_2460	2	/* 2460 MHz	  */
+#define		PSA_SUBBAND_2484	3	/* 2484 MHz	  */
+#define		PSA_SUBBAND_2430_5	4	/* 2430.5 MHz	  */
   unsigned char	psa_quality_thr;	/* [0x21] Modem Quality Threshold */
-  unsigned char	psa_mod_delay;		/* [0x22] Modem Delay ??? (reserved) */
+  unsigned char	psa_mod_delay;		/* [0x22] Modem Delay (?) (reserved) */
   unsigned char	psa_nwid[2];		/* [0x23-0x24] Network ID */
-  unsigned char	psa_nwid_select;	/* [0x25] Network ID Select On Off */
-  unsigned char	psa_encryption_select;	/* [0x26] Encryption On Off */
+  unsigned char	psa_nwid_select;	/* [0x25] Network ID Select On/Off */
+  unsigned char	psa_encryption_select;	/* [0x26] Encryption On/Off */
   unsigned char	psa_encryption_key[8];	/* [0x27-0x2E] Encryption Key */
   unsigned char	psa_databus_width;	/* [0x2F] AT bus width select 8/16 */
   unsigned char	psa_call_code[8];	/* [0x30-0x37] (Japan) Call Code */
@@ -183,8 +183,8 @@
 
 #define	PSA_SIZE	64
 
-/* Calculate offset of a field in the above structure
- * Warning : only even addresses are used */
+/* Calculate offset of a field in the above structure.
+ * Warning:  only even addresses are used. */
 #define	psaoff(p,f) 	((unsigned short) ((void *)(&((psa_t *) ((void *) NULL + (p)))->f) - (void *) NULL))
 
 /******************** MODEM MANAGEMENT INTERFACE ********************/
@@ -196,25 +196,25 @@
 struct mmw_t
 {
   unsigned char	mmw_encr_key[8];	/* encryption key */
-  unsigned char	mmw_encr_enable;	/* enable/disable encryption */
-#define	MMW_ENCR_ENABLE_MODE	0x02	/* Mode of security option */
-#define	MMW_ENCR_ENABLE_EN	0x01	/* Enable security option */
+  unsigned char	mmw_encr_enable;	/* Enable or disable encryption. */
+#define	MMW_ENCR_ENABLE_MODE	0x02	/* mode of security option */
+#define	MMW_ENCR_ENABLE_EN	0x01	/* Enable security option. */
   unsigned char	mmw_unused0[1];		/* unused */
-  unsigned char	mmw_des_io_invert;	/* Encryption option */
-#define	MMW_DES_IO_INVERT_RES	0x0F	/* Reserved */
-#define	MMW_DES_IO_INVERT_CTRL	0xF0	/* Control ??? (set to 0) */
+  unsigned char	mmw_des_io_invert;	/* encryption option */
+#define	MMW_DES_IO_INVERT_RES	0x0F	/* reserved */
+#define	MMW_DES_IO_INVERT_CTRL	0xF0	/* control (?) (set to 0) */
   unsigned char	mmw_unused1[5];		/* unused */
   unsigned char	mmw_loopt_sel;		/* looptest selection */
-#define	MMW_LOOPT_SEL_DIS_NWID	0x40	/* disable NWID filtering */
-#define	MMW_LOOPT_SEL_INT	0x20	/* activate Attention Request */
-#define	MMW_LOOPT_SEL_LS	0x10	/* looptest w/o collision avoidance */
+#define	MMW_LOOPT_SEL_DIS_NWID	0x40	/* Disable NWID filtering. */
+#define	MMW_LOOPT_SEL_INT	0x20	/* Activate Attention Request. */
+#define	MMW_LOOPT_SEL_LS	0x10	/* looptest, no collision avoidance */
 #define MMW_LOOPT_SEL_LT3A	0x08	/* looptest 3a */
 #define	MMW_LOOPT_SEL_LT3B	0x04	/* looptest 3b */
 #define	MMW_LOOPT_SEL_LT3C	0x02	/* looptest 3c */
 #define	MMW_LOOPT_SEL_LT3D	0x01	/* looptest 3d */
   unsigned char	mmw_jabber_enable;	/* jabber timer enable */
   /* Abort transmissions > 200 ms */
-  unsigned char	mmw_freeze;		/* freeze / unfreeeze signal level */
+  unsigned char	mmw_freeze;		/* freeze or unfreeze signal level */
   /* 0 : signal level & qual updated for every new message, 1 : frozen */
   unsigned char	mmw_anten_sel;		/* antenna selection */
 #define MMW_ANTEN_SEL_SEL	0x01	/* direct antenna selection */
@@ -227,7 +227,7 @@
   unsigned char	mmw_thr_pre_set;	/* level threshold preset */
   /* Discard all packet with signal < this value (4) */
   unsigned char	mmw_decay_prm;		/* decay parameters */
-  unsigned char	mmw_decay_updat_prm;	/* decay update parameterz */
+  unsigned char	mmw_decay_updat_prm;	/* decay update parameters */
   unsigned char	mmw_quality_thr;	/* quality (z-quotient) threshold */
   /* Discard all packet with quality < this value (3) */
   unsigned char	mmw_netw_id_l;		/* NWID low order byte */
@@ -237,31 +237,31 @@
   /* 2.0 Hardware extension - frequency selection support */
   unsigned char	mmw_mode_select;	/* for analog tests (set to 0) */
   unsigned char	mmw_unused3[1];		/* unused */
-  unsigned char	mmw_fee_ctrl;		/* frequency eeprom control */
-#define	MMW_FEE_CTRL_PRE	0x10	/* Enable protected instructions */
-#define	MMW_FEE_CTRL_DWLD	0x08	/* Download eeprom to mmc */
-#define	MMW_FEE_CTRL_CMD	0x07	/* EEprom commands : */
+  unsigned char	mmw_fee_ctrl;		/* frequency EEPROM control */
+#define	MMW_FEE_CTRL_PRE	0x10	/* Enable protected instructions. */
+#define	MMW_FEE_CTRL_DWLD	0x08	/* Download EEPROM to mmc. */
+#define	MMW_FEE_CTRL_CMD	0x07	/* EEPROM commands:  */
 #define	MMW_FEE_CTRL_READ	0x06	/* Read */
 #define	MMW_FEE_CTRL_WREN	0x04	/* Write enable */
-#define	MMW_FEE_CTRL_WRITE	0x05	/* Write data to address */
-#define	MMW_FEE_CTRL_WRALL	0x04	/* Write data to all addresses */
+#define	MMW_FEE_CTRL_WRITE	0x05	/* Write data to address. */
+#define	MMW_FEE_CTRL_WRALL	0x04	/* Write data to all addresses. */
 #define	MMW_FEE_CTRL_WDS	0x04	/* Write disable */
 #define	MMW_FEE_CTRL_PRREAD	0x16	/* Read addr from protect register */
 #define	MMW_FEE_CTRL_PREN	0x14	/* Protect register enable */
-#define	MMW_FEE_CTRL_PRCLEAR	0x17	/* Unprotect all registers */
-#define	MMW_FEE_CTRL_PRWRITE	0x15	/* Write addr in protect register */
+#define	MMW_FEE_CTRL_PRCLEAR	0x17	/* Unprotect all registers. */
+#define	MMW_FEE_CTRL_PRWRITE	0x15	/* Write address in protect register */
 #define	MMW_FEE_CTRL_PRDS	0x14	/* Protect register disable */
-  /* Never issue this command (PRDS) : it's irreversible !!! */
+  /* Never issue the PRDS command:  it's irreversible! */
 
-  unsigned char	mmw_fee_addr;		/* EEprom address */
-#define	MMW_FEE_ADDR_CHANNEL	0xF0	/* Select the channel */
+  unsigned char	mmw_fee_addr;		/* EEPROM address */
+#define	MMW_FEE_ADDR_CHANNEL	0xF0	/* Select the channel. */
 #define	MMW_FEE_ADDR_OFFSET	0x0F	/* Offset in channel data */
 #define	MMW_FEE_ADDR_EN		0xC0	/* FEE_CTRL enable operations */
 #define	MMW_FEE_ADDR_DS		0x00	/* FEE_CTRL disable operations */
 #define	MMW_FEE_ADDR_ALL	0x40	/* FEE_CTRL all operations */
 #define	MMW_FEE_ADDR_CLEAR	0xFF	/* FEE_CTRL clear operations */
 
-  unsigned char	mmw_fee_data_l;		/* Write data to EEprom */
+  unsigned char	mmw_fee_data_l;		/* Write data to EEPROM. */
   unsigned char	mmw_fee_data_h;		/* high octet */
   unsigned char	mmw_ext_ant;		/* Setting for external antenna */
 #define	MMW_EXT_ANT_EXTANT	0x01	/* Select external antenna */
@@ -293,13 +293,13 @@
 #define	MMR_DCE_STATUS_LOOPT_IND	0x02	/* loop test indicated */
 #define	MMR_DCE_STATUS_TX_BUSY		0x04	/* transmitter on */
 #define	MMR_DCE_STATUS_JBR_EXPIRED	0x08	/* jabber timer expired */
-  unsigned char	mmr_dsp_id;		/* DSP id (AA = Daedalus rev A) */
+  unsigned char	mmr_dsp_id;		/* DSP ID (AA = Daedalus rev A) */
   unsigned char	mmr_unused2[2];		/* unused */
-  unsigned char	mmr_correct_nwid_l;	/* # of correct NWID's rxd (low) */
-  unsigned char	mmr_correct_nwid_h;	/* # of correct NWID's rxd (high) */
-  /* Warning : Read high order octet first !!! */
-  unsigned char	mmr_wrong_nwid_l;	/* # of wrong NWID's rxd (low) */
-  unsigned char	mmr_wrong_nwid_h;	/* # of wrong NWID's rxd (high) */
+  unsigned char	mmr_correct_nwid_l;	/* # of correct NWIDs rxd (low) */
+  unsigned char	mmr_correct_nwid_h;	/* # of correct NWIDs rxd (high) */
+  /* Warning:  read high-order octet first! */
+  unsigned char	mmr_wrong_nwid_l;	/* # of wrong NWIDs rxd (low) */
+  unsigned char	mmr_wrong_nwid_h;	/* # of wrong NWIDs rxd (high) */
   unsigned char	mmr_thr_pre_set;	/* level threshold preset */
 #define	MMR_THR_PRE_SET		0x3F		/* level threshold preset */
 #define	MMR_THR_PRE_SET_CUR	0x80		/* Current signal above it */
@@ -312,17 +312,17 @@
   unsigned char	mmr_sgnl_qual;		/* signal quality */
 #define	MMR_SGNL_QUAL		0x0F		/* signal quality */
 #define	MMR_SGNL_QUAL_ANT	0x80		/* current antenna used */
-  unsigned char	mmr_netw_id_l;		/* NWID low order byte ??? */
+  unsigned char	mmr_netw_id_l;		/* NWID low order byte (?) */
   unsigned char	mmr_unused3[3];		/* unused */
 
   /* 2.0 Hardware extension - frequency selection support */
-  unsigned char	mmr_fee_status;		/* Status of frequency eeprom */
-#define	MMR_FEE_STATUS_ID	0xF0		/* Modem revision id */
+  unsigned char	mmr_fee_status;		/* Status of frequency EEPROM */
+#define	MMR_FEE_STATUS_ID	0xF0		/* Modem revision ID */
 #define	MMR_FEE_STATUS_DWLD	0x08		/* Download in progress */
-#define	MMR_FEE_STATUS_BUSY	0x04		/* EEprom busy */
+#define	MMR_FEE_STATUS_BUSY	0x04		/* EEPROM busy */
   unsigned char	mmr_unused4[1];		/* unused */
-  unsigned char	mmr_fee_data_l;		/* Read data from eeprom (low) */
-  unsigned char	mmr_fee_data_h;		/* Read data from eeprom (high) */
+  unsigned char	mmr_fee_data_l;		/* Read data from EEPROM (low) */
+  unsigned char	mmr_fee_data_h;		/* Read data from EEPROM (high) */
 };
 
 #define	MMR_SIZE	36

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