patch-2.4.4 linux/include/asm-arm/arch-cl7500/irq.h
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- Lines: 278
- Date:
Thu Apr 12 12:20:31 2001
- Orig file:
v2.4.3/linux/include/asm-arm/arch-cl7500/irq.h
- Orig date:
Mon Sep 18 15:15:22 2000
diff -u --recursive --new-file v2.4.3/linux/include/asm-arm/arch-cl7500/irq.h linux/include/asm-arm/arch-cl7500/irq.h
@@ -2,14 +2,16 @@
* include/asm-arm/arch-cl7500/irq.h
*
* Copyright (C) 1996 Russell King
- * Copyright (C) 1999 Nexus Electronics Ltd.
+ * Copyright (C) 1999, 2001 Nexus Electronics Ltd.
*
* Changelog:
* 10-10-1996 RMK Brought up to date with arch-sa110eval
* 22-08-1998 RMK Restructured IRQ routines
* 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code
*/
+
#include <asm/hardware/iomd.h>
+#include <asm/io.h>
static inline int fixup_irq(unsigned int irq)
{
@@ -19,7 +21,7 @@
printk("Spurious ISA IRQ!\n");
return irq;
}
- irq = 40;
+ irq = IRQ_ISA_BASE;
while (!(isabits & 1)) {
irq++;
isabits >>= 1;
@@ -31,161 +33,121 @@
static void cl7500_mask_irq_ack_a(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" bic %0, %0, %1\n"
-" strb %0, [%2]\n"
-" strb %1, [%3]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKA)),
- "r" (ioaddr(IOMD_IRQCLRA)));
+ mask = 1 << irq;
+ val = iomd_readb(IOMD_IRQMASKA);
+ iomd_writeb(val & ~mask, IOMD_IRQMASKA);
+ iomd_writeb(mask, IOMD_IRQCLRA);
}
static void cl7500_mask_irq_a(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" bic %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKA)));
+ mask = 1 << irq;
+ val = iomd_readb(IOMD_IRQMASKA);
+ iomd_writeb(val & ~mask, IOMD_IRQMASKA);
}
static void cl7500_unmask_irq_a(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" orr %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKA)));
+ mask = 1 << irq;
+ val = iomd_readb(IOMD_IRQMASKA);
+ iomd_writeb(val | mask, IOMD_IRQMASKA);
}
static void cl7500_mask_irq_b(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" bic %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKB)));
+ mask = 1 << (irq & 7);
+ val = iomd_readb(IOMD_IRQMASKB);
+ iomd_writeb(val & ~mask, IOMD_IRQMASKB);
}
static void cl7500_unmask_irq_b(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" orr %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKB)));
+ mask = 1 << (irq & 7);
+ val = iomd_readb(IOMD_IRQMASKB);
+ iomd_writeb(val | mask, IOMD_IRQMASKB);
}
static void cl7500_mask_irq_c(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" bic %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKC)));
+ mask = 1 << (irq & 7);
+ val = iomd_readb(IOMD_IRQMASKC);
+ iomd_writeb(val & ~mask, IOMD_IRQMASKC);
}
static void cl7500_unmask_irq_c(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" orr %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKC)));
+ mask = 1 << (irq & 7);
+ val = iomd_readb(IOMD_IRQMASKC);
+ iomd_writeb(val | mask, IOMD_IRQMASKC);
}
static void cl7500_mask_irq_d(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" bic %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKD)));
+ mask = 1 << (irq & 7);
+ val = iomd_readb(IOMD_IRQMASKD);
+ iomd_writeb(val & ~mask, IOMD_IRQMASKD);
}
static void cl7500_unmask_irq_d(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" orr %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKD)));
+ mask = 1 << (irq & 7);
+ val = iomd_readb(IOMD_IRQMASKD);
+ iomd_writeb(val | mask, IOMD_IRQMASKD);
}
static void cl7500_mask_irq_dma(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" bic %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_DMAMASK)));
+ mask = 1 << (irq & 7);
+ val = iomd_readb(IOMD_DMAMASK);
+ iomd_writeb(val & ~mask, IOMD_DMAMASK);
}
static void cl7500_unmask_irq_dma(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" orr %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_DMAMASK)));
+ mask = 1 << (irq & 7);
+ val = iomd_readb(IOMD_DMAMASK);
+ iomd_writeb(val | mask, IOMD_DMAMASK);
}
static void cl7500_mask_irq_fiq(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" bic %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_FIQMASK)));
+ mask = 1 << (irq & 7);
+ val = iomd_readb(IOMD_FIQMASK);
+ iomd_writeb(val & ~mask, IOMD_FIQMASK);
}
static void cl7500_unmask_irq_fiq(unsigned int irq)
{
- unsigned int temp;
+ unsigned int val, mask;
- __asm__ __volatile__(
- "ldrb %0, [%2]\n"
-" orr %0, %0, %1\n"
-" strb %0, [%2]"
- : "=&r" (temp)
- : "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_FIQMASK)));
+ mask = 1 << (irq & 7);
+ val = iomd_readb(IOMD_FIQMASK);
+ iomd_writeb(val | mask, IOMD_FIQMASK);
}
static void no_action(int cpl, void *dev_id, struct pt_regs *regs)
@@ -196,14 +158,12 @@
static __inline__ void irq_init_irq(void)
{
- extern void ecard_disableirq(unsigned int irq);
- extern void ecard_enableirq(unsigned int irq);
int irq;
- outb(0, IOMD_IRQMASKA);
- outb(0, IOMD_IRQMASKB);
- outb(0, IOMD_FIQMASK);
- outb(0, IOMD_DMAMASK);
+ iomd_writeb(0, IOMD_IRQMASKA);
+ iomd_writeb(0, IOMD_IRQMASKB);
+ iomd_writeb(0, IOMD_FIQMASK);
+ iomd_writeb(0, IOMD_DMAMASK);
for (irq = 0; irq < NR_IRQS; irq++) {
switch (irq) {
@@ -239,14 +199,14 @@
irq_desc[irq].unmask = cl7500_unmask_irq_c;
break;
- case 32 ... 39:
+ case 40 ... 47:
irq_desc[irq].valid = 1;
irq_desc[irq].mask_ack = cl7500_mask_irq_d;
irq_desc[irq].mask = cl7500_mask_irq_d;
irq_desc[irq].unmask = cl7500_unmask_irq_d;
break;
- case 40 ... 47:
+ case 48 ... 55:
irq_desc[irq].valid = 1;
irq_desc[irq].probe_ok = 1;
irq_desc[irq].mask_ack = no_action;
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