patch-2.4.4 linux/arch/sparc64/kernel/pci_impl.h

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diff -u --recursive --new-file v2.4.3/linux/arch/sparc64/kernel/pci_impl.h linux/arch/sparc64/kernel/pci_impl.h
@@ -1,4 +1,4 @@
-/* $Id: pci_impl.h,v 1.6 2000/03/25 05:18:11 davem Exp $
+/* $Id: pci_impl.h,v 1.7 2001/03/28 10:56:34 davem Exp $
  * pci_impl.h: Helper definitions for PCI controller support.
  *
  * Copyright (C) 1999 David S. Miller (davem@redhat.com)
@@ -41,6 +41,7 @@
 /* Configuration space access. */
 extern spinlock_t pci_poke_lock;
 extern volatile int pci_poke_in_progress;
+extern volatile int pci_poke_cpu;
 extern volatile int pci_poke_faulted;
 
 static __inline__ void pci_config_read8(u8 *addr, u8 *ret)
@@ -49,6 +50,7 @@
 	u8 byte;
 
 	spin_lock_irqsave(&pci_poke_lock, flags);
+	pci_poke_cpu = smp_processor_id();
 	pci_poke_in_progress = 1;
 	pci_poke_faulted = 0;
 	__asm__ __volatile__("membar #Sync\n\t"
@@ -58,6 +60,7 @@
 			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 			     : "memory");
 	pci_poke_in_progress = 0;
+	pci_poke_cpu = -1;
 	if (!pci_poke_faulted)
 		*ret = byte;
 	spin_unlock_irqrestore(&pci_poke_lock, flags);
@@ -69,6 +72,7 @@
 	u16 word;
 
 	spin_lock_irqsave(&pci_poke_lock, flags);
+	pci_poke_cpu = smp_processor_id();
 	pci_poke_in_progress = 1;
 	pci_poke_faulted = 0;
 	__asm__ __volatile__("membar #Sync\n\t"
@@ -78,6 +82,7 @@
 			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 			     : "memory");
 	pci_poke_in_progress = 0;
+	pci_poke_cpu = -1;
 	if (!pci_poke_faulted)
 		*ret = word;
 	spin_unlock_irqrestore(&pci_poke_lock, flags);
@@ -89,6 +94,7 @@
 	u32 dword;
 
 	spin_lock_irqsave(&pci_poke_lock, flags);
+	pci_poke_cpu = smp_processor_id();
 	pci_poke_in_progress = 1;
 	pci_poke_faulted = 0;
 	__asm__ __volatile__("membar #Sync\n\t"
@@ -98,6 +104,7 @@
 			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 			     : "memory");
 	pci_poke_in_progress = 0;
+	pci_poke_cpu = -1;
 	if (!pci_poke_faulted)
 		*ret = dword;
 	spin_unlock_irqrestore(&pci_poke_lock, flags);
@@ -108,6 +115,7 @@
 	unsigned long flags;
 
 	spin_lock_irqsave(&pci_poke_lock, flags);
+	pci_poke_cpu = smp_processor_id();
 	pci_poke_in_progress = 1;
 	pci_poke_faulted = 0;
 	__asm__ __volatile__("membar #Sync\n\t"
@@ -117,6 +125,7 @@
 			     : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 			     : "memory");
 	pci_poke_in_progress = 0;
+	pci_poke_cpu = -1;
 	spin_unlock_irqrestore(&pci_poke_lock, flags);
 }
 
@@ -125,6 +134,7 @@
 	unsigned long flags;
 
 	spin_lock_irqsave(&pci_poke_lock, flags);
+	pci_poke_cpu = smp_processor_id();
 	pci_poke_in_progress = 1;
 	pci_poke_faulted = 0;
 	__asm__ __volatile__("membar #Sync\n\t"
@@ -134,6 +144,7 @@
 			     : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 			     : "memory");
 	pci_poke_in_progress = 0;
+	pci_poke_cpu = -1;
 	spin_unlock_irqrestore(&pci_poke_lock, flags);
 }
 
@@ -142,6 +153,7 @@
 	unsigned long flags;
 
 	spin_lock_irqsave(&pci_poke_lock, flags);
+	pci_poke_cpu = smp_processor_id();
 	pci_poke_in_progress = 1;
 	pci_poke_faulted = 0;
 	__asm__ __volatile__("membar #Sync\n\t"
@@ -151,6 +163,7 @@
 			     : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 			     : "memory");
 	pci_poke_in_progress = 0;
+	pci_poke_cpu = -1;
 	spin_unlock_irqrestore(&pci_poke_lock, flags);
 }
 

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