patch-2.4.25 linux-2.4.25/arch/sparc64/kernel/pci_sabre.c
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- Lines: 65
- Date:
2004-02-18 05:36:31.000000000 -0800
- Orig file:
linux-2.4.24/arch/sparc64/kernel/pci_sabre.c
- Orig date:
2003-11-28 10:26:19.000000000 -0800
diff -urN linux-2.4.24/arch/sparc64/kernel/pci_sabre.c linux-2.4.25/arch/sparc64/kernel/pci_sabre.c
@@ -325,16 +325,22 @@
return PCIBIOS_SUCCESSFUL;
}
+/* When accessing PCI config space of the PCI controller itself (bus
+ * 0, device slot 0, function 0) there are restrictions. Each
+ * register must be accessed as it's natural size. Thus, for example
+ * the Vendor ID must be accessed as a 16-bit quantity.
+ */
+
static int sabre_read_byte(struct pci_dev *dev, int where, u8 *value)
{
- if (dev->bus->number)
- return __sabre_read_byte(dev, where, value);
-
- if (sabre_out_of_range(dev->devfn)) {
+ if (!dev->bus->number && sabre_out_of_range(dev->devfn)) {
*value = 0xff;
return PCIBIOS_SUCCESSFUL;
}
+ if (dev->bus->number || PCI_SLOT(dev->devfn))
+ return __sabre_read_byte(dev, where, value);
+
if (where < 8) {
u16 tmp;
@@ -350,14 +356,14 @@
static int sabre_read_word(struct pci_dev *dev, int where, u16 *value)
{
- if (dev->bus->number)
- return __sabre_read_word(dev, where, value);
-
- if (sabre_out_of_range(dev->devfn)) {
+ if (!dev->bus->number && sabre_out_of_range(dev->devfn)) {
*value = 0xffff;
return PCIBIOS_SUCCESSFUL;
}
+ if (dev->bus->number || PCI_SLOT(dev->devfn))
+ return __sabre_read_word(dev, where, value);
+
if (where < 8)
return __sabre_read_word(dev, where, value);
else {
@@ -375,14 +381,14 @@
{
u16 tmp;
- if (dev->bus->number)
- return __sabre_read_dword(dev, where, value);
-
- if (sabre_out_of_range(dev->devfn)) {
+ if (!dev->bus->number && sabre_out_of_range(dev->devfn)) {
*value = 0xffffffff;
return PCIBIOS_SUCCESSFUL;
}
+ if (dev->bus->number || PCI_SLOT(dev->devfn))
+ return __sabre_read_dword(dev, where, value);
+
sabre_read_word(dev, where, &tmp);
*value = tmp;
sabre_read_word(dev, where + 2, &tmp);
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