patch-2.4.22 linux-2.4.22/include/asm-arm/arch-at91rm9200/AT91RM9200_UHP.h

• Lines: 52
• Date: 2003-08-25 04:44:43.000000000 -0700
• Orig file: linux-2.4.21/include/asm-arm/arch-at91rm9200/AT91RM9200_UHP.h
• Orig date: 1969-12-31 16:00:00.000000000 -0800

diff -urN linux-2.4.21/include/asm-arm/arch-at91rm9200/AT91RM9200_UHP.h linux-2.4.22/include/asm-arm/arch-at91rm9200/AT91RM9200_UHP.h
@@ -0,0 +1,51 @@
+// ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+// ----------------------------------------------------------------------------
+//  The software is delivered "AS IS" without warranty or condition of any
+//  kind, either express, implied or statutory. This includes without
+//  limitation any warranty or condition with respect to merchantability or
+//  fitness for any particular purpose, or against the infringements of
+//  intellectual property rights of others.
+// ----------------------------------------------------------------------------
+// File Name           : AT91RM9200.h
+// Object              : AT91RM9200 / USB Host definitions
+// Generated           : AT91 SW Application Group  12/03/2002 (10:48:02)
+//
+// ----------------------------------------------------------------------------
+
+#ifndef AT91RM9200_UHP_H
+#define AT91RM9200_UHP_H
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR USB Host Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+
+typedef struct _AT91S_UHP {
+	AT91_REG	 UHP_HcRevision; 	// Revision
+	AT91_REG	 UHP_HcControl; 	// Operating modes for the Host Controller
+	AT91_REG	 UHP_HcCommandStatus; 	// Command & status Register
+	AT91_REG	 UHP_HcInterruptStatus; 	// Interrupt Status Register
+	AT91_REG	 UHP_HcInterruptEnable; 	// Interrupt Enable Register
+	AT91_REG	 UHP_HcInterruptDisable; 	// Interrupt Disable Register
+	AT91_REG	 UHP_HcHCCA; 	// Pointer to the Host Controller Communication Area
+	AT91_REG	 UHP_HcPeriodCurrentED; 	// Current Isochronous or Interrupt Endpoint Descriptor
+	AT91_REG	 UHP_HcControlHeadED; 	// First Endpoint Descriptor of the Control list
+	AT91_REG	 UHP_HcControlCurrentED; 	// Endpoint Control and Status Register
+	AT91_REG	 UHP_HcBulkHeadED; 	// First endpoint register of the Bulk list
+	AT91_REG	 UHP_HcBulkCurrentED; 	// Current endpoint of the Bulk list
+	AT91_REG	 UHP_HcBulkDoneHead; 	// Last completed transfer descriptor
+	AT91_REG	 UHP_HcFmInterval; 	// Bit time between 2 consecutive SOFs
+	AT91_REG	 UHP_HcFmRemaining; 	// Bit time remaining in the current Frame
+	AT91_REG	 UHP_HcFmNumber; 	// Frame number
+	AT91_REG	 UHP_HcPeriodicStart; 	// Periodic Start
+	AT91_REG	 UHP_HcLSThreshold; 	// LS Threshold
+	AT91_REG	 UHP_HcRhDescriptorA; 	// Root Hub characteristics A
+	AT91_REG	 UHP_HcRhDescriptorB; 	// Root Hub characteristics B
+	AT91_REG	 UHP_HcRhStatus; 	// Root Hub Status register
+	AT91_REG	 UHP_HcRhPortStatus[2]; 	// Root Hub Port Status Register
+} AT91S_UHP, *AT91PS_UHP;
+
+#endif
+
+#endif