patch-2.4.20 linux-2.4.20/include/asm-mips64/semaphore-helper.h
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- Lines: 70
- Date:
Thu Nov 28 15:53:15 2002
- Orig file:
linux-2.4.19/include/asm-mips64/semaphore-helper.h
- Orig date:
Wed Jul 4 11:50:39 2001
diff -urN linux-2.4.19/include/asm-mips64/semaphore-helper.h linux-2.4.20/include/asm-mips64/semaphore-helper.h
@@ -17,20 +17,18 @@
atomic_inc(&sem->waking);
}
-static inline int
-waking_non_zero(struct semaphore *sem)
+static inline int waking_non_zero(struct semaphore *sem)
{
int ret, tmp;
__asm__ __volatile__(
- "1:\tll\t%1, %2\n\t"
+ "1:\tll\t%1, %2\t\t\t# waking_non_zero\n\t"
"blez\t%1, 2f\n\t"
"subu\t%0, %1, 1\n\t"
"sc\t%0, %2\n\t"
- "beqz\t%0, 1b\n\t"
+ "beqz\t%0, 1b\n"
"2:"
- ".text"
- : "=r" (ret), "=r" (tmp), "=m" (sem->waking)
+ : "=r" (ret), "=r" (tmp), "+m" (sem->waking)
: "0" (0));
return ret;
@@ -43,17 +41,17 @@
* -EINTR interrupted
*
* We must undo the sem->count down_interruptible decrement
- * simultaneously and atomicly with the sem->waking adjustment,
+ * simultaneously and atomically with the sem->waking adjustment,
* otherwise we can race with wake_one_more.
*
- * This is accomplished by doing a 64-bit ll/sc on the 2 32-bit words.
+ * This is accomplished by doing a 64-bit lld/scd on the 2 32-bit words.
*
* Pseudocode:
*
* If(sem->waking > 0) {
* Decrement(sem->waking)
* Return(SUCCESS)
- * } else If(segnal_pending(tsk)) {
+ * } else If(signal_pending(tsk)) {
* Increment(sem->count)
* Return(-EINTR)
* } else {
@@ -102,7 +100,7 @@
"b\t2f\n"
"1:\tbeqz\t%3, 2f\n\t"
"li\t%0, %4\n\t"
- /*
+ /*
* It would be nice to assume that sem->count
* is != -1, but we will guard against that case
*/
@@ -124,12 +122,11 @@
}
/*
- * waking_non_zero_trylock is unused. we do everything in
+ * waking_non_zero_trylock is unused. we do everything in
* down_trylock and let non-ll/sc hosts bounce around.
*/
-static inline int
-waking_non_zero_trylock(struct semaphore *sem)
+static inline int waking_non_zero_trylock(struct semaphore *sem)
{
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
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