patch-2.4.19 linux-2.4.19/drivers/ieee1394/pcilynx.h

• Lines: 46
• Date: Fri Aug 2 17:39:44 2002
• Orig file: linux-2.4.18/drivers/ieee1394/pcilynx.h
• Orig date: Sun Aug 12 12:39:02 2001

diff -urN linux-2.4.18/drivers/ieee1394/pcilynx.h linux-2.4.19/drivers/ieee1394/pcilynx.h
@@ -25,6 +25,8 @@
 #define CHANNEL_ASYNC_SEND       3
 #define CHANNEL_ISO_SEND         4
 
+#define PCILYNX_CONFIG_ROM_LENGTH   1024
+
 typedef int pcl_t;
 
 struct ti_lynx {
@@ -40,15 +42,15 @@
                 u32 product;
         } phyic;
 
-        enum { clear, have_host_struct,  have_intr, have_aux_buf, have_pcl_mem,
-               have_1394_buffers, have_iomappings } state;
+        enum { clear, have_intr, have_aux_buf, have_pcl_mem,
+               have_1394_buffers, have_iomappings, is_host } state;
         
         /* remapped memory spaces */
         void *registers;
         void *local_rom;
         void *local_ram;
         void *aux_port;
-
+        quadlet_t config_rom[PCILYNX_CONFIG_ROM_LENGTH/4];
 
 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
         atomic_t aux_intr_seen;
@@ -109,6 +111,8 @@
                 struct tasklet_struct tq;
                 spinlock_t lock;
         } iso_rcv;
+
+	u32 i2c_driven_state; /* the state we currently drive the Serial EEPROM Control register */
 };
 
 /* the per-file data structure for mem space access */
@@ -156,6 +160,8 @@
 #define MISC_CONTROL                      0x40
 #define MISC_CONTROL_SWRESET              (1<<0)
 
+#define SERIAL_EEPROM_CONTROL             0x44
+
 #define PCI_INT_STATUS                    0x48
 #define PCI_INT_ENABLE                    0x4c               
 /* status and enable have identical bit numbers */