patch-2.3.39 linux/arch/i386/kernel/setup.c
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- Lines: 118
- Date:
Mon Jan 10 14:05:32 2000
- Orig file:
v2.3.38/linux/arch/i386/kernel/setup.c
- Orig date:
Fri Jan 7 19:13:21 2000
diff -u --recursive --new-file v2.3.38/linux/arch/i386/kernel/setup.c linux/arch/i386/kernel/setup.c
@@ -31,6 +31,11 @@
*
* Added proper L2 cache detection for Coppermine
* Dragan Stancevic <visitor@valinux.com>, October 1999
+ *
+ * Added the origninal array for capability flags but forgot to credit
+ * myself :) (~1998) Fixed/cleaned up some cpu_model_info and other stuff
+ * Jauder Ho <jauderho@carumba.com>, January 2000
+ *
*/
/*
@@ -1166,6 +1171,8 @@
c->x86_vendor = X86_VENDOR_CENTAUR;
else if (!strcmp(v, "NexGenDriven"))
c->x86_vendor = X86_VENDOR_NEXGEN;
+ else if (!strcmp(v, "RiseRiseRise"))
+ c->x86_vendor = X86_VENDOR_RISE;
else
c->x86_vendor = X86_VENDOR_UNKNOWN;
}
@@ -1176,6 +1183,7 @@
char *model_names[16];
};
+/* Naming convention should be: <Name> [(<Codename>)] */
static struct cpu_model_info cpu_models[] __initdata = {
{ X86_VENDOR_INTEL, 4,
{ "486 DX-25/33", "486 DX-50", "486 SX", "486 DX/2", "486 SL",
@@ -1188,8 +1196,9 @@
NULL, NULL, NULL, NULL }},
{ X86_VENDOR_INTEL, 6,
{ "Pentium Pro A-step", "Pentium Pro", NULL, "Pentium II (Klamath)",
- NULL, "Pentium II (Deschutes)", "Mobile Pentium II", "Pentium III (Katmai)",
- "Pentium III (Coppermine)", NULL, NULL, NULL, NULL, NULL, NULL }},
+ NULL, "Pentium II (Deschutes)", "Mobile Pentium II",
+ "Pentium III (Katmai)", "Pentium III (Coppermine)", NULL, NULL,
+ NULL, NULL, NULL, NULL }},
{ X86_VENDOR_AMD, 4,
{ NULL, NULL, NULL, "486 DX/2", NULL, NULL, NULL, "486 DX/2-WB",
"486 DX/4", "486 DX/4-WB", NULL, NULL, NULL, NULL, "Am5x86-WT",
@@ -1210,6 +1219,9 @@
{ X86_VENDOR_NEXGEN, 5,
{ "Nx586", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL }},
+ { X86_VENDOR_RISE, 5,
+ { "mP6", "mP6", NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL }},
};
void __init identify_cpu(struct cpuinfo_x86 *c)
@@ -1300,8 +1312,9 @@
if (c->x86_model <= 16)
p = cpu_models[i].model_names[c->x86_model];
- /* Names for the Pentium II Celeron processors
- detectable only by also checking the cache size */
+ /* Names for the Pentium II/Celeron processors
+ detectable only by also checking the cache size.
+ Dixon is NOT a Celeron. */
if ((cpu_models[i].vendor == X86_VENDOR_INTEL)
&& (cpu_models[i].x86 == 6))
{
@@ -1310,7 +1323,7 @@
else if(c->x86_model == 6 && c->x86_cache_size == 128)
p = "Celeron (Mendocino)";
else if(c->x86_model == 5 && c->x86_cache_size == 256)
- p = "Celeron (Dixon)";
+ p = "Mobile Pentium II (Dixon)";
}
}
}
@@ -1341,7 +1354,7 @@
static char *cpu_vendor_names[] __initdata = {
- "Intel", "Cyrix", "AMD", "UMC", "NexGen", "Centaur" };
+ "Intel", "Cyrix", "AMD", "UMC", "NexGen", "Centaur", "Rise" };
void __init print_cpu_info(struct cpuinfo_x86 *c)
@@ -1373,11 +1386,22 @@
{
char *p = buffer;
int sep_bug;
+
+ /*
+ * Flags should be entered into the array ONLY if there is no overlap.
+ * Else a number should be used and then overridden in the case
+ * statement below. --Jauder <jauderho@carumba.com>
+ *
+ * NOTE: bits 10, 19-22, 26-31 are reserved.
+ *
+ * Data courtesy of http://www.sandpile.org/arch/cpuid.htm
+ * Thanks to the Greasel!
+ */
static char *x86_cap_flags[] = {
"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
"cx8", "apic", "10", "sep", "mtrr", "pge", "mca", "cmov",
- "pat", "17", "psn", "19", "20", "21", "22", "mmx",
- "24", "kni", "26", "27", "28", "29", "30", "31"
+ "16", "pse36", "psn", "19", "20", "21", "22", "mmx",
+ "24", "xmm", "26", "27", "28", "29", "30", "31"
};
struct cpuinfo_x86 *c = cpu_data;
int i, n;
@@ -1430,9 +1454,8 @@
break;
case X86_VENDOR_INTEL:
- x86_cap_flags[17] = "pse36";
- x86_cap_flags[18] = "psn";
- x86_cap_flags[24] = "osfxsr";
+ x86_cap_flags[16] = "pat";
+ x86_cap_flags[24] = "fxsr";
break;
case X86_VENDOR_CENTAUR:
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