patch-2.3.13 linux/arch/alpha/kernel/machvec.h
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- Lines: 46
- Date:
Thu Jul 29 13:37:22 1999
- Orig file:
v2.3.12/linux/arch/alpha/kernel/machvec.h
- Orig date:
Tue Jun 22 10:46:52 1999
diff -u --recursive --new-file v2.3.12/linux/arch/alpha/kernel/machvec.h linux/arch/alpha/kernel/machvec.h
@@ -8,14 +8,10 @@
#include <linux/config.h>
-/* Whee. TSUNAMI doesn't have an HAE. Fix things up for the GENERIC
- kernel by defining the HAE address to be that of the cache. Now
- we can read and write it as we like. ;-) */
+/* Whee. Both TSUNAMI and POLARIS don't have an HAE. Fix things up for
+ the GENERIC kernel by defining the HAE address to be that of the cache.
+ Now we can read and write it as we like. ;-) */
#define TSUNAMI_HAE_ADDRESS (&alpha_mv.hae_cache)
-
-/* Whee. POLARIS doesn't have an HAE. Fix things up for the GENERIC
- kernel by defining the HAE address to be that of the cache. Now
- we can read and write it as we like. ;-) */
#define POLARIS_HAE_ADDRESS (&alpha_mv.hae_cache)
/* Only a few systems don't define IACK_SC, handling all interrupts through
@@ -36,21 +32,24 @@
#define DO_EV4_MMU \
max_asn: EV4_MAX_ASN, \
- mv_get_mmu_context: ev4_get_mmu_context, \
+ mv_switch_mm: ev4_switch_mm, \
+ mv_activate_mm: ev4_activate_mm, \
mv_flush_tlb_current: ev4_flush_tlb_current, \
mv_flush_tlb_other: ev4_flush_tlb_other, \
mv_flush_tlb_current_page: ev4_flush_tlb_current_page
#define DO_EV5_MMU \
max_asn: EV5_MAX_ASN, \
- mv_get_mmu_context: ev5_get_mmu_context, \
+ mv_switch_mm: ev5_switch_mm, \
+ mv_activate_mm: ev5_activate_mm, \
mv_flush_tlb_current: ev5_flush_tlb_current, \
mv_flush_tlb_other: ev5_flush_tlb_other, \
mv_flush_tlb_current_page: ev5_flush_tlb_current_page
#define DO_EV6_MMU \
max_asn: EV6_MAX_ASN, \
- mv_get_mmu_context: ev5_get_mmu_context, \
+ mv_switch_mm: ev5_switch_mm, \
+ mv_activate_mm: ev5_activate_mm, \
mv_flush_tlb_current: ev5_flush_tlb_current, \
mv_flush_tlb_other: ev5_flush_tlb_other, \
mv_flush_tlb_current_page: ev5_flush_tlb_current_page
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