patch-2.3.13 linux/arch/alpha/kernel/bios32.c

• Lines: 124
• Date: Fri Aug 6 10:41:47 1999
• Orig file: v2.3.12/linux/arch/alpha/kernel/bios32.c
• Orig date: Tue Dec 1 09:33:59 1998

diff -u --recursive --new-file v2.3.12/linux/arch/alpha/kernel/bios32.c linux/arch/alpha/kernel/bios32.c
@@ -26,7 +26,7 @@
 
 #include <linux/config.h>
 #include <linux/kernel.h>
-#include <linux/tasks.h>
+#include <linux/threads.h>
 #include <linux/smp.h>
 #include <linux/smp_lock.h>
 #include <linux/init.h>
@@ -456,27 +456,23 @@
 	 * HACK: the PCI-to-EISA bridge does not seem to identify
 	 *       itself as a bridge... :-(
 	 */
-	if (dev->vendor == PCI_VENDOR_ID_INTEL &&
-	    dev->device == PCI_DEVICE_ID_INTEL_82375) {
+	if (dev->vendor == PCI_VENDOR_ID_INTEL
+	    && dev->device == PCI_DEVICE_ID_INTEL_82375) {
 		dev->class = PCI_CLASS_BRIDGE_EISA;
 		DBG_DEVS(("layout_dev: ignoring PCEB...\n"));
 		return;
 	}
 
-	if (dev->vendor == PCI_VENDOR_ID_INTEL &&
-	    dev->device == PCI_DEVICE_ID_INTEL_82378) {
+	if (dev->vendor == PCI_VENDOR_ID_INTEL
+	    && dev->device == PCI_DEVICE_ID_INTEL_82378) {
 		dev->class = PCI_CLASS_BRIDGE_ISA;
 		DBG_DEVS(("layout_dev: ignoring SIO...\n"));
 		return;
 	}
 
-	/*
-	 * We don't have code that will init the CYPRESS bridge correctly
-	 * so we do the next best thing, and depend on the previous
-	 * console code to do the right thing, and ignore it here... :-\
-	 */
-	if (dev->vendor == PCI_VENDOR_ID_CONTAQ &&
-	    dev->device == PCI_DEVICE_ID_CONTAQ_82C693) {
+	if (dev->vendor == PCI_VENDOR_ID_CONTAQ
+	    && dev->device == PCI_DEVICE_ID_CONTAQ_82C693
+	    && dev->class >> 8 == PCI_CLASS_BRIDGE_ISA) {
 		DBG_DEVS(("layout_dev: ignoring CYPRESS bridge...\n"));
 		return;
 	}
@@ -496,8 +492,10 @@
 					   0xffffffff);
 		pcibios_read_config_dword(bus->number, dev->devfn, off, &base);
 		if (!base) {
-			/* this base-address register is unused */
-			dev->base_address[idx] = 0;
+			/* This base-address register is unused.  */
+			dev->resource[idx].start = 0;
+			dev->resource[idx].end = 0;
+			dev->resource[idx].flags = 0;
 			continue;
 		}
 
@@ -518,6 +516,17 @@
 			base &= PCI_BASE_ADDRESS_IO_MASK;
 			mask = (~base << 1) | 0x1;
 			size = (mask & base) & 0xffffffff;
+
+			/* We don't want to disturb normal IDE functions, so
+			   we don't touch the first two I/O ports on the
+			   Cypress.  */
+			if (dev->vendor == PCI_VENDOR_ID_CONTAQ
+			    && dev->device == PCI_DEVICE_ID_CONTAQ_82C693
+			    && dev->class >> 8 == PCI_CLASS_BRIDGE_ISA
+			    && idx < 2) {
+				continue;
+			}
+
 			/*
 			 * Aligning to 0x800 rather than the minimum base of
 			 * 0x400 is an attempt to avoid having devices in 
@@ -535,7 +544,12 @@
 			new_io_reset(dev, off, orig_base);
 
 			handle = PCI_HANDLE(bus->number) | base | 1;
-			dev->base_address[idx] = handle;
+			dev->resource[idx].start
+			  = handle & PCI_BASE_ADDRESS_IO_MASK;
+			dev->resource[idx].end
+			  = dev->resource[idx].start + size - 1;
+			dev->resource[idx].flags
+			  = handle & ~PCI_BASE_ADDRESS_IO_MASK;
 
 			DBG_DEVS(("layout_dev: dev 0x%x IO @ 0x%lx (0x%x)\n",
 				  dev->device, handle, size));
@@ -615,7 +629,12 @@
 			new_io_reset(dev, off, orig_base);
 
 			handle = PCI_HANDLE(bus->number) | base;
-			dev->base_address[idx] = handle;
+			dev->resource[idx].start
+			  = handle & PCI_BASE_ADDRESS_MEM_MASK;
+			dev->resource[idx].end
+			  = dev->resource[idx].start + size - 1;
+			dev->resource[idx].flags
+			  = handle & ~PCI_BASE_ADDRESS_MEM_MASK;
 
 			/*
 			 * Currently for 64-bit cards, we simply do the usual
@@ -637,7 +656,9 @@
 					new_io_reset (dev, off+4, orig_base2);
 				}
 				/* Bypass hi reg in the loop.  */
-				dev->base_address[++idx] = 0;
+				dev->resource[++idx].start = 0;
+				dev->resource[idx].end = 0;
+				dev->resource[idx].flags = 0;
 
 				printk("bios32 WARNING: "
 				       "handling 64-bit device in "
@@ -655,8 +676,7 @@
 	if (dev->class >> 8 == PCI_CLASS_NOT_DEFINED ||
 	    dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA ||
 	    dev->class >> 8 == PCI_CLASS_STORAGE_IDE ||
-	    dev->class >> 16 == PCI_BASE_CLASS_DISPLAY)
-	{
+	    dev->class >> 16 == PCI_BASE_CLASS_DISPLAY) {
 		/*
 		 * All of these (may) have I/O scattered all around
 		 * and may not use i/o-base address registers at all.