patch-2.3.11 linux/include/asm-i386/processor.h

• Lines: 185
• Date: Wed Jul 21 14:52:46 1999
• Orig file: v2.3.10/linux/include/asm-i386/processor.h
• Orig date: Tue Jun 22 14:41:40 1999

diff -u --recursive --new-file v2.3.10/linux/include/asm-i386/processor.h linux/include/asm-i386/processor.h
@@ -12,6 +12,7 @@
 #include <asm/segment.h>
 #include <asm/page.h>
 #include <asm/types.h>
+#include <linux/threads.h>
 
 /*
  * Default implementation of macro that returns current
@@ -95,6 +96,7 @@
 #define X86_FEATURE_AMD3D	0x80000000
 
 extern struct cpuinfo_x86 boot_cpu_data;
+extern struct tss_struct init_tss[NR_CPUS];
 
 #ifdef __SMP__
 extern struct cpuinfo_x86 cpu_data[];
@@ -124,6 +126,48 @@
 		: "cc");
 }
 
+
+/*
+ * Intel CPU features in CR4
+ */
+#define X86_CR4_VME	0x0001	/* enable vm86 extensions */
+#define X86_CR4_PVI	0x0002	/* virtual interrupts flag enable */
+#define X86_CR4_TSD	0x0004	/* disable time stamp at ipl 3 */
+#define X86_CR4_DE	0x0008	/* enable debugging extensions */
+#define X86_CR4_PSE	0x0010	/* enable page size extensions */
+#define X86_CR4_PAE	0x0020	/* enable physical address extensions */
+#define X86_CR4_MCE	0x0040	/* Machine check enable */
+#define X86_CR4_PGE	0x0080	/* enable global pages */
+#define X86_CR4_PCE	0x0100	/* enable performance counters at ipl 3 */
+
+/*
+ * Save the cr4 feature set we're using (ie
+ * Pentium 4MB enable and PPro Global page
+ * enable), so that any CPU's that boot up
+ * after us can get the correct flags.
+ */
+extern unsigned long mmu_cr4_features;
+
+static inline void set_in_cr4 (unsigned long mask)
+{
+	mmu_cr4_features |= mask;
+	__asm__("movl %%cr4,%%eax\n\t"
+		"orl %0,%%eax\n\t"
+		"movl %%eax,%%cr4\n"
+		: : "irg" (mask)
+		:"ax");
+}
+
+static inline void clear_in_cr4 (unsigned long mask)
+{
+	mmu_cr4_features &= ~mask;
+	__asm__("movl %%cr4,%%eax\n\t"
+		"andl %0,%%eax\n\t"
+		"movl %%eax,%%cr4\n"
+		: : "irg" (~mask)
+		:"ax");
+}
+
 /*
  *      Cyrix CPU configuration register indexes
  */
@@ -177,6 +221,8 @@
  * Size of io_bitmap in longwords: 32 is ports 0-0x3ff.
  */
 #define IO_BITMAP_SIZE	32
+#define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
+#define INVALID_IO_BITMAP_OFFSET 0x8000
 
 struct i387_hard_struct {
 	long	cwd;
@@ -213,7 +259,7 @@
 	unsigned long seg;
 } mm_segment_t;
 
-struct thread_struct {
+struct tss_struct {
 	unsigned short	back_link,__blh;
 	unsigned long	esp0;
 	unsigned short	ss0,__ss0h;
@@ -238,19 +284,44 @@
 	unsigned short	ldt, __ldth;
 	unsigned short	trace, bitmap;
 	unsigned long	io_bitmap[IO_BITMAP_SIZE+1];
-	unsigned long	tr;
+	/*
+	 * pads the TSS to be cacheline-aligned (size is 0x100)
+	 */
+	unsigned long __cacheline_filler[5];
+};
+
+struct thread_struct {
+	unsigned long	esp0;
+	unsigned long	cr3;
+	unsigned long	eip;
+	unsigned long	esp;
+	unsigned long	fs;
+	unsigned long	gs;
+/* Hardware debugging registers */
+	unsigned long	debugreg[8];  /* %%db0-7 debug registers */
+/* fault info */
 	unsigned long	cr2, trap_no, error_code;
-	mm_segment_t	segment;
-/* debug registers */
-	long debugreg[8];  /* Hardware debugging registers */
 /* floating point info */
-	union i387_union i387;
+	union i387_union	i387;
 /* virtual 86 mode info */
-	struct vm86_struct * vm86_info;
-	unsigned long screen_bitmap;
-	unsigned long v86flags, v86mask, v86mode, saved_esp0;
+	struct vm86_struct	* vm86_info;
+	unsigned long		screen_bitmap;
+	unsigned long		v86flags, v86mask, v86mode, saved_esp0;
+/* IO permissions */
+	int		ioperm;
+	unsigned long	io_bitmap[IO_BITMAP_SIZE+1];
 };
 
+#define INIT_THREAD  {						\
+	0,(long) &swapper_pg_dir - PAGE_OFFSET,			\
+	0, 0, 0, 0, 						\
+	{ [0 ... 7] = 0 },	/* debugging registers */	\
+	0, 0, 0,						\
+	{ { 0, }, },		/* 387 state */			\
+	0,0,0,0,0,0,						\
+	0,{~0,}			/* io permissions */		\
+}
+
 #define INIT_MMAP \
 { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
 
@@ -265,13 +336,9 @@
 	0,0,0,0, /* esp,ebp,esi,edi */				\
 	0,0,0,0,0,0, /* es,cs,ss */				\
 	0,0,0,0,0,0, /* ds,fs,gs */				\
-	_LDT(0),0, /* ldt */					\
-	0, 0x8000, /* tace, bitmap */				\
-	{~0, }, /* ioperm */					\
-	_TSS(0), 0, 0, 0, (mm_segment_t) { 0 }, /* obsolete */	\
-	{ 0, },							\
-	{ { 0, }, },  /* 387 state */				\
-	NULL, 0, 0, 0, 0, 0, /* vm86_info */			\
+	__LDT(0),0, /* ldt */					\
+	0, INVALID_IO_BITMAP_OFFSET, /* tace, bitmap */		\
+	{~0, } /* ioperm */					\
 }
 
 #define start_thread(regs, new_eip, new_esp) do {		\
@@ -291,10 +358,13 @@
 
 /* Free all resources held by a thread. */
 extern void release_thread(struct task_struct *);
+/*
+ * create a kernel thread without removing it from tasklists
+ */
 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 
 /* Copy and release all segment info associated with a VM */
-extern void copy_segments(int nr, struct task_struct *p, struct mm_struct * mm);
+extern void copy_segments(struct task_struct *p, struct mm_struct * mm);
 extern void release_segments(struct mm_struct * mm);
 extern void forget_segments(void);
 
@@ -302,7 +372,7 @@
  * FPU lazy state save handling..
  */
 #define save_fpu(tsk) do { \
-	asm volatile("fnsave %0\n\tfwait":"=m" (tsk->tss.i387)); \
+	asm volatile("fnsave %0\n\tfwait":"=m" (tsk->thread.i387)); \
 	tsk->flags &= ~PF_USEDFPU; \
 	stts(); \
 } while (0)
@@ -327,6 +397,7 @@
 	return ((unsigned long *)t->esp)[3];
 }
 
+#define THREAD_SIZE (2*PAGE_SIZE)
 extern struct task_struct * alloc_task_struct(void);
 extern void free_task_struct(struct task_struct *);