patch-2.2.8 linux/arch/ppc/kernel/chrp_pci.c

• Lines: 383
• Date: Tue May 11 08:24:32 1999
• Orig file: v2.2.7/linux/arch/ppc/kernel/chrp_pci.c
• Orig date: Tue Mar 23 14:35:46 1999

diff -u --recursive --new-file v2.2.7/linux/arch/ppc/kernel/chrp_pci.c linux/arch/ppc/kernel/chrp_pci.c
@@ -15,10 +15,14 @@
 #include <asm/hydra.h>
 #include <asm/prom.h>
 #include <asm/gg2.h>
+#include <asm/ide.h>
+#include <asm/machdep.h>
+
+#include "pci.h"
 
 /* LongTrail */
 #define pci_config_addr(bus, dev, offset) \
-	(GG2_PCI_CONFIG_BASE | ((bus)<<16) | ((dev)<<8) | (offset))
+(GG2_PCI_CONFIG_BASE | ((bus)<<16) | ((dev)<<8) | (offset))
 
 volatile struct Hydra *Hydra = NULL;
 
@@ -30,159 +34,78 @@
 int gg2_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn,
 				 unsigned char offset, unsigned char *val)
 {
-    if (bus > 7) {
-	*val = 0xff;
-	return PCIBIOS_DEVICE_NOT_FOUND;
-    }
-    *val = in_8((unsigned char *)pci_config_addr(bus, dev_fn, offset));
-    return PCIBIOS_SUCCESSFUL;
+	if (bus > 7) {
+		*val = 0xff;
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+	*val = in_8((unsigned char *)pci_config_addr(bus, dev_fn, offset));
+	return PCIBIOS_SUCCESSFUL;
 }
 
 int gg2_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn,
 				 unsigned char offset, unsigned short *val)
 {
-    if (bus > 7) {
-	*val = 0xffff;
-	return PCIBIOS_DEVICE_NOT_FOUND;
-    }
-    *val = in_le16((unsigned short *)pci_config_addr(bus, dev_fn, offset));
-    return PCIBIOS_SUCCESSFUL;
+	if (bus > 7) {
+		*val = 0xffff;
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+	*val = in_le16((unsigned short *)pci_config_addr(bus, dev_fn, offset));
+	return PCIBIOS_SUCCESSFUL;
 }
 
 
 int gg2_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn,
 				  unsigned char offset, unsigned int *val)
 {
-    if (bus > 7) {
-	*val = 0xffffffff;
-	return PCIBIOS_DEVICE_NOT_FOUND;
-    }
-    *val = in_le32((unsigned int *)pci_config_addr(bus, dev_fn, offset));
-    return PCIBIOS_SUCCESSFUL;
+	if (bus > 7) {
+		*val = 0xffffffff;
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+	*val = in_le32((unsigned int *)pci_config_addr(bus, dev_fn, offset));
+	return PCIBIOS_SUCCESSFUL;
 }
 
 int gg2_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn,
 				  unsigned char offset, unsigned char val)
 {
-    if (bus > 7)
-	return PCIBIOS_DEVICE_NOT_FOUND;
-    out_8((unsigned char *)pci_config_addr(bus, dev_fn, offset), val);
-    return PCIBIOS_SUCCESSFUL;
+	if (bus > 7)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	out_8((unsigned char *)pci_config_addr(bus, dev_fn, offset), val);
+	return PCIBIOS_SUCCESSFUL;
 }
 
 int gg2_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn,
 				  unsigned char offset, unsigned short val)
 {
-    if (bus > 7)
-	return PCIBIOS_DEVICE_NOT_FOUND;
-    out_le16((unsigned short *)pci_config_addr(bus, dev_fn, offset), val);
-    return PCIBIOS_SUCCESSFUL;
+	if (bus > 7)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	out_le16((unsigned short *)pci_config_addr(bus, dev_fn, offset), val);
+	return PCIBIOS_SUCCESSFUL;
 }
 
 int gg2_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn,
 				   unsigned char offset, unsigned int val)
 {
-   if (bus > 7)
-	return PCIBIOS_DEVICE_NOT_FOUND;
-    out_le32((unsigned int *)pci_config_addr(bus, dev_fn, offset), val);
-    return PCIBIOS_SUCCESSFUL;
-}
-
-extern volatile unsigned int *pci_config_address;
-extern volatile unsigned char *pci_config_data;
-
-#define DEV_FN_MAX (31<<3)
-
-int raven_pcibios_read_config_byte(unsigned char bus, 
-                                      unsigned char dev_fn,
-                                      unsigned char offset, 
-                                      unsigned char *val)
-{
-        if (dev_fn >= DEV_FN_MAX) return PCIBIOS_DEVICE_NOT_FOUND;
-        out_be32(pci_config_address,
-                 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
-        *val = in_8(pci_config_data+(offset&3));
-        return PCIBIOS_SUCCESSFUL;
-}
-
-int raven_pcibios_read_config_word(unsigned char bus, 
-                                      unsigned char dev_fn,
-                                      unsigned char offset, 
-                                      unsigned short *val)
-{
-        if (dev_fn >= DEV_FN_MAX) return PCIBIOS_DEVICE_NOT_FOUND;
-        if (offset&1)return PCIBIOS_BAD_REGISTER_NUMBER;
-        out_be32(pci_config_address,
-                 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
-        *val = in_le16((volatile unsigned short *)
-                       (pci_config_data+(offset&3)));
-        return PCIBIOS_SUCCESSFUL;
-}
-
-int raven_pcibios_read_config_dword(unsigned char bus, 
-                                       unsigned char dev_fn,
-                                       unsigned char offset, 
-                                       unsigned int *val)
-{
-        if (dev_fn >= DEV_FN_MAX) return PCIBIOS_DEVICE_NOT_FOUND;
-        if (offset&3)return PCIBIOS_BAD_REGISTER_NUMBER;
-        out_be32(pci_config_address,
-                 0x80|(bus<<8)|(dev_fn<<16)|(offset<<24));
-        *val = in_le32((volatile unsigned int *)(pci_config_data));
-        return PCIBIOS_SUCCESSFUL;
-}
-
-int raven_pcibios_write_config_byte(unsigned char bus, 
-                                       unsigned char dev_fn,
-                                       unsigned char offset, 
-                                       unsigned char val) 
-{
-        if (dev_fn >= DEV_FN_MAX) return PCIBIOS_DEVICE_NOT_FOUND;
-        out_be32(pci_config_address,
-                 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
-        out_8(pci_config_data+(offset&3),val);
-        return PCIBIOS_SUCCESSFUL;
-}
-
-int raven_pcibios_write_config_word(unsigned char bus, 
-                                       unsigned char dev_fn,
-                                       unsigned char offset, 
-                                       unsigned short val) 
-{
-        if (dev_fn >= DEV_FN_MAX) return PCIBIOS_DEVICE_NOT_FOUND;
-        if (offset&1)return PCIBIOS_BAD_REGISTER_NUMBER;
-        out_be32(pci_config_address,
-                 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
-        out_le16((volatile unsigned short *)(pci_config_data+(offset&3)),val);
-        return PCIBIOS_SUCCESSFUL;
-}
-
-int raven_pcibios_write_config_dword(unsigned char bus, 
-                                        unsigned char dev_fn,
-                                        unsigned char offset, 
-                                        unsigned int val) 
-{
-        if (dev_fn >= DEV_FN_MAX) return PCIBIOS_DEVICE_NOT_FOUND;
-        if (offset&3)return PCIBIOS_BAD_REGISTER_NUMBER;
-        out_be32(pci_config_address,
-                 0x80|(bus<<8)|(dev_fn<<16)|(offset<<24));
-        out_le32((volatile unsigned int *)pci_config_data,val);
-        return PCIBIOS_SUCCESSFUL;
+	if (bus > 7)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	out_le32((unsigned int *)pci_config_addr(bus, dev_fn, offset), val);
+	return PCIBIOS_SUCCESSFUL;
 }
 
 #define python_config_address(bus) (unsigned *)((0xfef00000+0xf8000)-(bus*0x100000))
 #define python_config_data(bus) ((0xfef00000+0xf8010)-(bus*0x100000))
-#define PYTHON_CFA(b, d, o)	(0x80 | ((b) << 8) | ((d) << 16) \
+#define PYTHON_CFA(b, d, o)	(0x80 | ((b<<6) << 8) | ((d) << 16) \
 				 | (((o) & ~3) << 24))
-     
+unsigned int python_busnr = 1;
+
 int python_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn,
 				    unsigned char offset, unsigned char *val)
 {
-	if (bus > 2) {
+	if (bus > python_busnr) {
 		*val = 0xff;
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
-	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset) );
+	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset));
 	*val = in_8((unsigned char *)python_config_data(bus) + (offset&3));
 	return PCIBIOS_SUCCESSFUL;
 }
@@ -190,11 +113,11 @@
 int python_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn,
 				    unsigned char offset, unsigned short *val)
 {
-	if (bus > 2) {
+	if (bus > python_busnr) {
 		*val = 0xffff;
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
-	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset) );
+	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset));
 	*val = in_le16((unsigned short *)(python_config_data(bus) + (offset&3)));
 	return PCIBIOS_SUCCESSFUL;
 }
@@ -203,11 +126,11 @@
 int python_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn,
 				     unsigned char offset, unsigned int *val)
 {
-	if (bus > 2) {
+	if (bus > python_busnr) {
 		*val = 0xffffffff;
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
-	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset) );
+	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset));
 	*val = in_le32((unsigned *)python_config_data(bus));
 	return PCIBIOS_SUCCESSFUL;
 }
@@ -215,9 +138,9 @@
 int python_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn,
 				     unsigned char offset, unsigned char val)
 {
-	if (bus > 2)
+	if (bus > python_busnr)
 		return PCIBIOS_DEVICE_NOT_FOUND;
-	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset) );
+	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset));
 	out_8((volatile unsigned char *)python_config_data(bus) + (offset&3), val);
 	return PCIBIOS_SUCCESSFUL;
 }
@@ -225,9 +148,9 @@
 int python_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn,
 				     unsigned char offset, unsigned short val)
 {
-	if (bus > 2)
+	if (bus > python_busnr)
 		return PCIBIOS_DEVICE_NOT_FOUND;
-	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset) );
+	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset));
 	out_le16((volatile unsigned short *)python_config_data(bus) + (offset&3),
 		 val);
 	return PCIBIOS_SUCCESSFUL;
@@ -236,9 +159,9 @@
 int python_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn,
 				      unsigned char offset, unsigned int val)
 {
-	if (bus > 2)
+	if (bus > python_busnr)
 		return PCIBIOS_DEVICE_NOT_FOUND;
-	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset) );
+	out_be32( python_config_address( bus ), PYTHON_CFA(bus,dev_fn,offset));
 	out_le32((unsigned *)python_config_data(bus) + (offset&3), val);
 	return PCIBIOS_SUCCESSFUL;
 }
@@ -264,7 +187,8 @@
     	/* all others are 1 (= default) */
 };
 
-__initfunc(int hydra_init(void))
+int __init
+hydra_init(void)
 {
 	struct device_node *np;
 
@@ -287,4 +211,97 @@
 	OpenPIC_InitSenses = hydra_openpic_initsenses;
 	OpenPIC_NumInitSenses = sizeof(hydra_openpic_initsenses);
 	return 1;
+}
+
+void __init
+chrp_pcibios_fixup(void)
+{
+	struct pci_dev *dev;
+	
+	/* some of IBM chrps have > 1 bus */
+	if ( !strncmp("IBM", get_property(find_path_device("/"),
+					 "name", NULL),3) )
+	{
+		pci_scan_peer_bridge(1);
+		pci_scan_peer_bridge(2);
+	}
+	
+	/* PCI interrupts are controlled by the OpenPIC */
+	for( dev=pci_devices ; dev; dev=dev->next )
+	{
+		if ( dev->irq )
+			dev->irq = openpic_to_irq( dev->irq );
+		/* adjust the io_port for the NCR cards for busses other than 0 -- Cort */
+		if ( (dev->bus->number > 0) && (dev->vendor == PCI_VENDOR_ID_NCR) )
+			dev->base_address[0] += (dev->bus->number*0x08000000);
+		/* these need to be absolute addrs for OF and Matrox FB -- Cort */
+		if ( dev->vendor == PCI_VENDOR_ID_MATROX )
+		{
+			if ( dev->base_address[0] < isa_mem_base )
+				dev->base_address[0] += isa_mem_base;
+			if ( dev->base_address[1] < isa_mem_base )
+				dev->base_address[1] += isa_mem_base;
+		}
+		/* the F50 identifies the amd as a trident */
+		if ( (dev->vendor == PCI_VENDOR_ID_TRIDENT) &&
+		      (dev->class == PCI_CLASS_NETWORK_ETHERNET) )
+		{
+			dev->vendor = PCI_VENDOR_ID_AMD;
+			pcibios_write_config_word(dev->bus->number, dev->devfn,
+						   PCI_VENDOR_ID, PCI_VENDOR_ID_AMD);
+		}
+	}
+}
+
+decl_config_access_method(grackle);
+decl_config_access_method(indirect);
+
+void __init
+chrp_setup_pci_ptrs(void)
+{
+	struct device_node *py;
+	
+        if ( !strncmp("MOT",
+                      get_property(find_path_device("/"), "model", NULL),3) )
+        {
+                pci_dram_offset = 0;
+                isa_mem_base = 0xf7000000;
+                isa_io_base = 0xfe000000;
+                set_config_access_method(grackle);
+        }
+        else
+        {
+		if ( (py = find_compatible_devices( "pci", "IBM,python" )) )
+		{
+			/* find out how many pythons */
+			while ( (py = py->next) ) python_busnr++;
+                        set_config_access_method(python);
+			/*
+			 * We base these values on the machine type but should
+			 * try to read them from the python controller itself.
+			 * -- Cort
+			 */
+			if ( !strncmp("IBM,7025-F50", get_property(find_path_device("/"), "name", NULL),12) )
+			{
+				pci_dram_offset = 0x80000000;
+				isa_mem_base = 0xa0000000;
+				isa_io_base = 0x88000000;
+			} else if ( !strncmp("IBM,7043-260",
+			   get_property(find_path_device("/"), "name", NULL),12) )
+			{
+				pci_dram_offset = 0x80000000;
+				isa_mem_base = 0xc0000000;
+				isa_io_base = 0xf8000000;
+			}
+                }
+                else
+                {
+			pci_dram_offset = 0;
+			isa_mem_base = 0xf7000000;
+			isa_io_base = 0xf8000000;
+			set_config_access_method(gg2);
+                }
+        }
+	
+	ppc_md.pcibios_fixup = chrp_pcibios_fixup;
 }